Comment 17 for bug 248509

(In reply to comment #20)
> I took a quick look at these patches, and they look entirely reasonable. The
> only question I have concerns the set_bit(X86_FEATURE_{L,M}FENCE_RDTSC,
> &c->x86_capability); don't we have to protect that by first checking if sse2 is
> enabled?

These barrier changes are done only for 64bit code. All 64bit machines have SSE2 enabled, atleast thats what include/asm-x86_64/cpufeature.h says

#define cpu_has_xmm2 1

So i don't think we need the xmm2 check for RHEL5 since the 32 and 64bit code is still separate.

Thanks,
Alok

  Upstream that's done with the "cpu_has_xmm2" check, but since RHEL-5
> doesn't have that, we'd have to do something a little more primitive. Or am I
> missing something?
>
> Chris Lalancette